In a NAND-type flash memory, a plurality of memory cells arranged along a column direction are connected to each other in series so as to form memory strings, and each memory string is connected to a corresponding bit line through a selection gate. Each bit line is connected to a sense amplifier circuit which performs sensing of write data and read data. All or half of a plurality of memory cells arranged in the word line direction are simultaneously selected, and a write operation or a read operation is collectively performed with respect to such memory cells which are simultaneously selected.
Recently, along with the reduction in size of the memory string, inter-cell interference between neighboring memory cells has increased. Because of this inter-cell interference, a possibility that erroneous data being written at the time of writing data in the memory cell has increased.